Step Maintenance 10 Steps To Organizing Your Computer: Step 3 — Desktop Organization Well, the last two weeks of computer organization have been expensive, time-consuming, frustrating, and boring. Sorry about that! And we are going to start with the desktop. Just like when we started organizing the kitchen by clearing everything off of the countertops in week 10 of the 40 Weeks 1 Whole House Challenge , we are going to start the same way with the computer and look at everything we have on the desktop. Now often, when I need to organize an area of my life that is not super exciting to me, I will trick myself into making it a project.
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Reading Assignments and Exercises The instruction set architecture ISA is a protocol that defines how a computing machine appears to a machine language programmer or compiler. The ISA describes the 1 memory model, 2 instruction format, types and modes, and 3 operand registers, types, and data addressing. Instruction types include arithmetic, logical, data transfer, and flow control. Instruction modes include kernel and user instructions. Hierarchical View As discussed previously, computing languages are translated from source code to assembly language to machine language, as illustrated notionally in Figure 2.
Figure 2. Example of computing language translation, adapted from [Maf01] The implementation of the ISA in hardware is couched in terms of the fetch-decode-execute cycle illustrated in Figure 2. In the fetch step, operands are retrieved from memory.
The decode step puts the operands into a format that the ALU can manipulate. The execute cycle performs the selected operation within the ALU. Basic ISA cycle, where fetch gets operands from memory, decode translates the operands into a format the ALU can accept, and execute performs an ALU operation on the decoded operands - adapted from [Maf01] 2.
Machine Language Machne language instructions are of four types: Arithmetic, Logical, Data transfer, and Branches also called flow control , as follows: Arithmetic: add addition , sub subtraction , mult multiplication , div division Logical: and, or, srl shift right logical , ssl shift left logical Data Transfer: lw load word , sw store word , lui load upper immediate Branches: Conditional: beq branch on equal , bne branch on not-equal , slt set on less-than , Unconditional: j jump , jr jump register , jal jump-and-link The MIPS instruction format uses the KISS principle keep it simple and stupid.
As we say more formally: Design Principle 1: Simplicity favors regularity. This means that the MIPS instruction format is the same for all instructions. Each instruction begins with an opcode that tells the machine what to do, followed by one to three operand symbols. MIPS instruction - simple addition example, adapted from [Maf01]. These instructions are symbolic examples of what MIPS actually understands. As an example of the symbolic notation used in Figure 2.
The s-registers can be thought of as containing data that are typically stored in C variables. Thus, in MIPS, operands cannot be any variable, and there are only thirty-two bit registers a memory location that holds 32 bits.
This conforms to the following observation: Design Principle 2: Smaller is faster. Thus, in proper MIPS code, the preceding example would become: 2. Instructions are fetched automatically by control, while data is transferred explicitly between the memory and processor.
Use of lw and sw instructions to transfer data between memory and processor, adapted from [Maf01]. Here, data is organized in linear memory as a stream of bits. Each byte is comprised of eight contiguous bits, and each word is comprised of four contiguous bytes.
Data stored in memory is referenced using an address, which is an identifier that points to a byte in memory. Addresses in MIPS range from 0 which points to data in the part of memory denoted as M up to 4,,, referenced data is written as M. Thus, all addresses are 32 bits long, so bit four-byte words are stored in MIPS memory. Since each word has length 4 bytes, the addresses referenced by these instructions must be aligned, that is, all bit words start at addresses 0, 4, Because of differences between computer manufacturers and the way different machines address memory, the MIPS address formats have two types of encoding: big endian and little endian, as shown in Figure 2.
Here, a decimal base address of 3, is broken down into a hexadecimal base address of 00 00 0c 1d Big endian stores the big part 00 at the top or beginning of the address, and little endian is the reverse of big endian stores 1d at the beginning of the address.
Example of big and little endian encoding, adapted from [Maf01]. There are other interesting things you can do with memory addressing, such as offsets. For example, suppose you wanted to add a number in memory location A and put the result in A. We know that A has the larger address, and this can be loaded using an offset of 8, as shown in Figure 2. Example of memory offsets, adapted from [Maf01]. The circled operands show how an address offset is represented in a MIPS instruction.
Instruction Representation Computer instructions are based on three number systems: decimal, binary, and hexadecimal. In the preceding section, we noted that the CPU control does this automatically. In hardware, this is typically accomplished by a device called an instruction sequencer. Machine Language Instruction Format In machine language, all instructions have the same length.
In MIPS, this design compromise produces instructions that are 32 bits long. The governing principle follows: Design Principle 3: Good design demands good compromises. MIPS instructions have three different formats: R format - Arithmetic instructions I format - Branch, transfer, and immediate instructions J format - Jump instructions These formats are further explained in Figure 2.
Note that jump instructions merely transfer control execution to the specified memory address. As a result, J-format instructions are not very interesting, so we will concentrate the remainder of discussion in this section on R- and I-format instructions.
MIPS instruction format, adapted from [Maf01]. Example 1. Also, note that the order of the operands in the machine language instruction ones and zeros is different than in the assembly-language version. Important Note. MIPS has several register conventions that you should know, which are summarized in the following table.
These conventions will be observed as we progress toward more involved MIPS programs. Table 2. Note that the funct code for subtraction 34 is different from that for addition 32 , and that there is no shifting. Example 3. Example 4. Note that the opcode for store 43 is different from that for load 35 , and that the addresses are kept the same, for simplicity. We next assemble these concepts together to show how an instruction is translated from a high-level language to assembly language, and thence to machine language.
Example 5. This is due to the bit word length four bytes that we discussed in Section 2. Since memory is structured as a linear array of bytes, to obtain the correct byte offset to maintain word alignment, we need to multiply the memory location in source code by the word length e. Special Cases Thus far, we have overviewed the basic add, sub, load, and store instructions. However, MIPS has several special cases of these instructions, which are designed to make programs run much faster.
We consider these special cases, as follows. Addition of Constants. By analyzing large bodies of source code also called corpi, the plural of corpus , the developers of MIPS were able to determine that small constants are used frequently and comprise approximately 50 percent of operands. In general, if an event occurs 50 percent or more of the time, then it is called the common case, and the following principle applies: Design Principle 4: Make the common case fast.
As a result of this concept, MIPS puts typical constants in memory and loads them into special hardwired registers e. Example 6. The constant 4 is represented at the right-hand part of the instruction as a two-byte bit value. Compilers have limited precision usually 32 bits. If a result of an addition or multiplication is a number that requires a binary representation larger than 32 bits, then we have a problem.
We call this situation register overflow, because the number to be loaded into the register is larger i. Some high-level languages e. MIPS provides two types of arithmetic instructions: add, sub, addi cause overflow; while addu, subu, addiu do not cause overflow.
Logical Operations. In MIPS, a logical constant is expressed as a vector of 32 ones and zeroes, not as an integer number. In contrast, MIPS instructions andi and ori have operands that are immediates, and the I-format instruction is used.
An example of the I-format logical instruction follows. Example 7. The first operand is stored in register t0, and is anded with a logical constant specified in hexadecimal as 0xFFF. This representation means fill the word with zeroes until you get to the last three digits, which are f, f, and f. When the logical and operation is applied bitwise to these operands, the result is shown below the line. Note that the word 0xFFF is called a mask because anding causes the result to be zero one in those bit positions where the mask has the value of zero resp.
Shift Instructions. In order to move the contents of a register to the left or right efficiently, MIPS has a dedicated shift capability that is controlled by the following shift instructions: sll shift left logical : fills empty bits with zeroes srl shift right logical : fills empty bits with zeroes sra shift right arithmetic : sign extends empty bits Example 8.
Since the instruction is R-format, note that the opcode is modified by the funct descriptor that occupies the last six bits of the instruction. Shift instructions are used for a wide variety of operations, including the pencil-and-paper algorithm for multiplication of binary numbers. Multiplication and Division.
For now, consider the following information as useful in the context of the MIPS instruction format. Multiplication and division of two N-bit numbers produce a result that can be as large as 2N significant digits i. As a result, MIPS uses two registers, called hi and lo, to store the upper and lower parts of the product for multiplication as well as the remainder and quotient for division.
Example 9. Assembly vs. Machine Language Assembly language is a convenient symbolic notation that is much easier to write and understand than a stream of ones and zeroes machine language. In MIPS assembly language notation, the destination result is first in the operand list. This is generally the convention for the vast majority of assembly languages.
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